1. Field of the Invention
The present invention relates generally to performance monitoring in processors, and more particularly to identifying sources of performance-related events in processors.
2. Related Art
In analyzing performance of a computer system, it is common practice to monitor for certain events and conditions that are indicators of the performance. When occurrence of one of these events or conditions is detected it is essential to identify the instruction responsible for the event or that is suffering a consequence of the condition and to capture certain detailed information related to the instruction.
In general, conventional ways to do this include the following. One way is to sample instructions one at a time, and then, if a predetermined event of interest, i.e., a “monitored event,” occurs for one of the sampled instructions, capture the address of the instruction and related data. This has the disadvantage that for many sampled instructions a monitored event does not occur. That is, capturing useful information depends on a chance concurrence in which the event of interest occurs for an instruction that is sampled.
Another way is to wait for a monitored event to happen and then capture the address of an instruction that is presently executing or that has just completed. This has the disadvantage that its usefulness tends to be limited to processors with short pipelines or that execute in-order and non-speculatively. As these disadvantages indicate, a need exists for improvement in identifying the source of a performance event.